What is a gate-all-around (nanosheet) transistor?
A gate-all-around transistor is a chip transistor whose gate, the part that switches it on and off, wraps completely around the channel that carries current. The channel is a stack of thin silicon sheets, so it is also called a nanosheet transistor.
Also known as: nanosheet transistor, GAAFET, GAA transistor
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How it works
A transistor is a tiny switch. Current flows through a channel between a source and a drain. A gate sits on the channel and turns that flow on or off. As transistors shrank, current began to leak across even when the switch was off, IEEE Spectrum explained in 2019. That wastes power and makes heat.
Before it came the FinFET, which Intel first introduced commercially in 2011 at the 22-nanometer node. The FinFET turned the channel into a thin, upright fin, with the gate draped over three sides. The bottom side stayed connected to the silicon below, so some current could still leak, Spectrum noted.
A gate-all-around transistor closes that gap. Its channel is a stack of thin, flat silicon sheets, and the gate surrounds each sheet completely. The sheets can be made wide to carry more current or narrow to save power. Researchers call the design a nanosheet. Companies use other names: Samsung calls its version MBCFET, and Intel calls its version RibbonFET.
Who makes them
Samsung said on June 30, 2022, that it had started initial production of a 3-nanometer process using gate-all-around transistors. It said the first chips were for high-performance, low-power computing, and that it planned to expand to mobile processors.
TSMC says its 2-nanometer process, N2, uses its first generation of nanosheet transistors. It says N2 started volume production in the fourth quarter of 2025. As of October 2026, Intel says its 18A process, which uses RibbonFET, is in high-volume production in the United States.
Why it matters
Chipmakers say the design gets around limits of the FinFET. Intel says RibbonFET supports continued transistor scaling beyond FinFET. Samsung said its first 3-nanometer process could cut power use by up to 45% compared with its 5-nanometer process. Those are company claims.
In 2019, researchers from Purdue University, CEA-Leti and IBM Research wrote in Spectrum that the nanosheet might be the last new transistor design for logic chips. That was a forecast, not a settled fact.
Sources
- The Nanosheet Transistor Is the Next (and Maybe Last) Step in Moore's Law, IEEE Spectrum
- Samsung Begins Chip Production Using 3nm Process Technology With GAA Architecture, Samsung Electronics
- 2nm Technology - Taiwan Semiconductor Manufacturing Company Limited, TSMC
- Intel 18A | See Our Biggest Process Innovation, Intel