How an AI Chip Is Made: From Design to Fab to Data Center
An AI chip is designed by one company, built on silicon wafers by another, joined to stacked memory in a packaging step and tested before it reaches a server rack. Here is each stage.
// ai chips & semiconductors
AI Chip Roadmap Tracker
Dated, sourced entries on AI chip launches since January 2024. They cover Nvidia, AMD and Intel accelerators, custom chips from cloud and AI companies, foundry nodes and HBM, plus targets companies have set through 2029.
Researched and fact-checked by AI, with no human review. How we verify
25 entries from 27 sources. Checked for news weekly; last checked
What this tracker follows
This tracker follows the hardware roadmap behind AI computing since January 2024. It covers:
- Data center accelerators, the chips used for AI training and inference, from Nvidia, AMD and Intel.
- Custom chips from Google, Amazon, Microsoft, Meta and OpenAI, whose partner is Broadcom.
- New manufacturing processes, called nodes, at TSMC, Samsung, Intel and Rapidus.
- High bandwidth memory (HBM), which stacks memory chips vertically, up to the HBM4 standard that JEDEC published in April 2025.
An entry is added when a company dates a concrete step. That means a chip or node is announced, enters production, ships or becomes available to customers. Each entry cites one source: the company's own release, blog post or web page. So performance and production figures are that company's claims, not independent measurements.
Entries marked scheduled are targets published by the named company, listed as of October 6, 2026. One example is TSMC's 2028 plan for its A14 process. Targets can change, and each entry says when its target was stated. Where a source gives only a quarter or a year, the entry is dated by year, as with TSMC's 2nm production start.
Left out on purpose: export controls, earnings and market forecasts, and supply deals and investments that set no product milestone. Also left out: chips for phones and PCs, benchmark results, startups, China-based chip designers and unconfirmed reports.
Scheduled next
Targets set by the organizations named. Dates like these often move.
Scheduled
TSMC targets A14 production in 2028, with A13 to follow in 2029
TSMC set these targets. A13 is a shrink of the A14 process TSMC announced in 2025. On April 22, 2026 it said A13 saves 6% in area and is due to enter production in 2029, a year after A14. It said A12, a version of the A14 platform with backside power delivery, is also scheduled for 2029.
Source: TSMC Debuts A13 Technology at 2026 North America Technology Symposium, TSMC
Scheduled
Nvidia targets Rubin Ultra systems for the second half of 2027
Nvidia gave this target in its coverage of CEO Jensen Huang's March 18, 2025 GTC keynote. It is listed here as stated then. The same post said Blackwell Ultra would reach systems in the second half of 2025. It also said each year would bring new Nvidia GPUs and CPUs.
Scheduled
Rapidus targets the start of 2nm mass production in Japan in 2027
Rapidus restated the 2027 target on April 11, 2026, when it said the Japanese agency NEDO had approved its fiscal 2026 plan and budget. It said its pilot line in Chitose, Hokkaido began running in April 2025. It also said that under the new plan it would release its process design kit generally to customers.
Source: NEDO Approves Rapidus’ FY2026 Plan and Budget for 2nm Semiconductor Projects, Rapidus
Timeline
CoreWeave announces availability of Nvidia Vera Rubin NVL72 on its cloud
CoreWeave said Vera Rubin NVL72 systems were available on its cloud. It said the AI lab Cognition was the first customer anywhere running production workloads on them. That ranking is CoreWeave's own claim. It said the two companies set up a Cognition cluster in early September 2026.
AMD launches Helios AI racks built on Instinct MI455X GPUs
At its Advancing AI 2026 event, AMD said Helios, a rack with 72 Instinct MI455X GPUs and 18 EPYC Venice CPUs, was in production. It said OpenAI expects to bring Helios online starting in the fourth quarter of 2026. It also said MI500 series GPUs are coming in 2027 and MI600 series GPUs in 2028.
Source: AAI 2026: AMD Delivers Full-Stack Compute for the Agentic AI Era, AMD
OpenAI and Broadcom unveil Jalapeño, an inference chip designed by OpenAI
OpenAI said it designed Jalapeño for large language model inference, with Broadcom among the partners handling chip implementation. It said engineering samples were running in its lab at the frequency and power targeted for production. It also said it was still measuring final performance.
Source: OpenAI and Broadcom unveil LLM-optimized inference chip, OpenAI
Intel says its 18A-P process has entered risk production
At the 2026 VLSI Symposium, Intel Foundry said 18A-P, the first performance enhancement in its 18A family, had entered risk production. Compared with 18A, it claimed 9% higher performance at the same power, or 18% lower power at the same performance. It said 18A entered production in 2025.
Source: Intel Foundry Details Process Milestones and Future Innovation at VLSI Symposium, Intel
Google details eighth-generation TPUs: TPU 8t for training, TPU 8i for inference
Google Cloud described two eighth-generation Tensor Processing Units (TPUs): TPU 8t for large-scale training and TPU 8i for inference. Compared with its Ironwood TPU, it claimed a performance-per-dollar improvement of up to 2.7x for training and up to 80% for inference.
Source: Inside the eighth-generation TPU: An architecture deep dive, Google Cloud
Samsung begins mass production of HBM4 and ships it to customers
Samsung said it had started mass production of HBM4 memory and shipped commercial products to customers, which it called an industry first. It cited a consistent speed of 11.7 Gbps, above the 8 Gbps industry standard. It said it expected HBM4E sampling to begin in the second half of 2026.
Microsoft introduces Maia 200, an in-house AI inference accelerator
Microsoft said Maia 200 is built on TSMC's 3nm process with 216GB of HBM3e memory. It said Maia 200 was already deployed in its US Central data center region near Des Moines, Iowa. It claimed 30% better performance per dollar than the latest hardware in its fleet.
Source: Maia 200: The AI accelerator built for inference, Microsoft
Nvidia launches the Rubin platform and says it is in full production
At CES, Nvidia announced Rubin, a six-chip platform that includes the Rubin GPU and Vera CPU. It said products based on Rubin would be available from partners in the second half of 2026. It claimed up to 10 times lower inference cost per token than its Blackwell platform.
AWS makes Trainium3 chips generally available in Trn3 UltraServers
Amazon Web Services announced general availability of EC2 Trn3 UltraServers running Trainium3. It called Trainium3 its fourth-generation AI chip and its first built on a 3nm process. It said one UltraServer scales to 144 chips and delivers up to 4.4 times the performance of Trn2 UltraServers.
Intel announces Crescent Island, a data center GPU for AI inference
At the 2025 OCP Global Summit, Intel said the GPU, code-named Crescent Island, would use its Xe3P architecture with 160GB of LPDDR5X memory. It said the GPU was being designed for air-cooled enterprise servers. Intel said at the time that it expected customer sampling in the second half of 2026.
Source: Intel to Expand AI Accelerator Portfolio with New GPU, Intel
SK hynix completes HBM4 development and readies mass production
SK hynix said it had finished developing HBM4 and set up a mass production system for it, which it called a world first. It said the memory has 2,048 input/output terminals, double the previous generation. It also said the memory runs above 10 Gbps, beyond the 8 Gbps operating speed in the JEDEC standard.
Source: SK hynix Completes World’s First HBM4 Development and Readies Mass Production, SK hynix
Rapidus begins prototyping 2nm gate-all-around transistors
Rapidus said prototyping of its 2nm gate-all-around (GAA) transistor structure had started at its IIM-1 foundry. It also said prototype wafers had begun to show their electrical characteristics. It said it completed EUV lithography exposure on April 1, 2025 and would begin mass production in 2027.
AMD launches the Instinct MI350 series and previews its Helios rack
At its Advancing AI 2025 event, AMD launched the Instinct MI350 series. It said rack-scale systems using the series were already rolling out in deployments such as Oracle Cloud Infrastructure. It said broad availability was set for the second half of 2025. It previewed Helios, a rack to use MI400 series GPUs.
Google introduces Ironwood, its seventh-generation TPU
At Google Cloud Next, Google introduced Ironwood, its seventh-generation Tensor Processing Unit and the first it designed specifically for inference. It said Ironwood scales to 9,216 liquid-cooled chips, has 192GB of high bandwidth memory per chip and would be available later in 2025.
Source: Ironwood: The first Google TPU for the age of inference, Google
TSMC starts volume production of its 2nm (N2) process
TSMC's technology page states that its 2nm process, N2, started volume production in the fourth quarter of 2025 as planned. The page gives no day or month. As read on October 6, 2026, it lists N2P, a version with further performance and power gains, for volume production in the second half of 2026.
Source: 2nm Technology - Taiwan Semiconductor Manufacturing Company Limited, TSMC
AMD announces the Instinct MI325X accelerator with 256GB of memory
AMD announced the Instinct MI325X with 256GB of HBM3E memory. It said production shipments were on track for the fourth quarter of 2024. It said systems from makers including Dell, HPE, Lenovo and Supermicro would follow from the first quarter of 2025. It also previewed the MI350 series for the second half of 2025.
Source: AMD Delivers Leadership AI Performance with AMD Instinct MI325X Accelerators, AMD
Samsung adds SF2Z, a 2nm process with backside power, to its foundry roadmap
At its Samsung Foundry Forum in San Jose, Samsung announced SF2Z, a 2nm process that puts power rails on the back of the wafer. Mass production of SF2Z was slated for 2027. Samsung also announced SF4U, a 4nm variant scheduled for 2025. Both dates are Samsung's own targets as stated in June 2024.
Source: Samsung Showcases AI-Era Vision and Latest Foundry Technologies at SFF 2024, Samsung Electronics
TSMC unveils its A16 process with backside power, planned for 2026
At its North America Technology Symposium, TSMC debuted A16. The process pairs nanosheet transistors with a backside power design TSMC calls Super Power Rail. Production was planned for 2026 as of that date. TSMC claimed 8-10% more speed at the same voltage, or 15-20% less power at the same speed, than N2P.
Meta details its next-generation MTIA chip for recommendation models
Meta said the next generation of its Meta Training and Inference Accelerator (MTIA) was running production models in its data centers, across 16 regions. It said early results showed three times the performance of its first-generation chip across four key models it evaluated.
Source: Our next generation Meta Training and Inference Accelerator, Meta
Intel introduces the Gaudi 3 AI accelerator
Intel said Gaudi 3, made on a 5nm process, would be available to server makers in the second quarter of 2024. It said general availability was anticipated in the third quarter and a PCIe add-in card in the fourth. Its release compared the chip's projected performance with Nvidia's H100.
Source: Intel Breaks Down Proprietary Walls to Bring Choice to Enterprise GenAI Market, Intel
SK hynix begins volume production of HBM3E memory
SK hynix said it had begun volume production of HBM3E for supply to a customer from late March 2024. It described itself as the first provider of HBM3E. It said the memory can process up to 1.18TB of data per second.
Source: SK hynix Begins Volume Production of Industry’s First HBM3E, SK hynix
Nvidia announces the Blackwell GPU platform at GTC
Nvidia announced the Blackwell architecture as the successor to Hopper. It said Blackwell GPUs have 208 billion transistors and are made on a custom TSMC 4NP process. It also announced the GB200 NVL72 rack, which combines 72 Blackwell GPUs and 36 Grace CPUs. It said partner products would be available starting later in 2024.
Source: NVIDIA Blackwell Platform Arrives to Power a New Era of Computing, Nvidia
Additional sources
Update history
- Rewritten in shorter, plainer sentences. No facts were changed.
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